1. Field of the Invention
The present invention relates to the fabrication of integrated circuits. More particularly, the invention relates to a process and apparatus for depositing low k dielectric layers on a substrate.
2. Background of the Invention
Semiconductor device geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called Moore""s Law), which means that the number of devices on a chip doubles every two years. Today""s fabrication plants are routinely producing devices having 0.35 xcexcm and even 0.18 xcexcm feature sizes, and tomorrow""s plants soon will be producing devices having even smaller geometries.
In order to further reduce the size of devices on integrated circuits, it has become necessary to use insulators having low dielectric constants (k less than 4, preferably less than 3) as gap fill layers, pre-metal dielectric layers, inter-metal dielectric layers, and shallow trench isolation dielectric layers to reduce the capacitive coupling between adjacent metal lines. The low k insulators can be deposited directly on conductive materials or on liner/barrier layers that prevent diffusion of byproducts and contaminants such as moisture onto conductive material. For example, moisture that can be generated during formation of a low k insulator readily diffuses to the surface of the conductive metal and increases the resistivity of the conductive metal surface. A barrier/liner layer formed from conventional silicon oxide or silicon nitride materials can block the diffusion of the byproducts and contaminants. However, the barrier/liner layers, e.g., SiN, typically have dielectric constants that are significantly greater than 4.0, and the high dielectric constants result in a combined insulator that does not significantly reduce the dielectric constant.
FIG. 1A illustrates a process for depositing a gap fill layer as described in International Publication Number WO 94/01885. The PECVD process deposits a multi-component dielectric layer wherein a silicon dioxide (SiO2) liner layer 2 is first deposited on a patterned metal layer having metal lines 3 formed on a substrate 4. The liner layer 2 is deposited by a plasma enhanced reaction of silane (SiH4) and nitrous oxide (N2O) at 300xc2x0 C. A self-planarizing low k dielectric layer 5 is then deposited on the liner layer 2 by reaction of silane and a hydroxyl compound. The self-planarizing layer 5 retains moisture that is removed by curing. The liner layer 2 is an oxidized silane film that has barrier properties when deposited in a manner which provides a dielectric constant of at least 4.5. The dielectric constant of the oxidized silane film can be decreased to about 4.1 by selecting process conditions less favorable for obtaining moisture barrier properties. Conventional liner layers, such as SiN, have even higher dielectric constants, and the combination of low k dielectric layers with high k dielectric liner layers can provide little or no improvement in the overall stack dielectric constant and capacitive coupling. An optional SiO2 cap layer 6 can be deposited on the self-planarizing low k dielectric layer 5 by the reaction of silane and N2O.
Gap fill layers produced by reacting hydrogen peroxide with silane to form hydroxyl groups are known, but it is difficult to obtain uniform films having low dielectric constants. The thickness of the deposited layers on semiconductor substrates is typically controlled by providing exact amounts of reactants. However, hydrogen peroxide is typically stored as a solution in water and it is difficult to feed exact amounts of hydrogen peroxide and silane within the reaction chambers. Thus, there is a need for methods that combine silicon compounds and hydroxyl forming compounds that are easier to control.
U.S. Pat. No. 5,593,741, issued Jan. 14, 1997, describes a gap fill process using silicon oxide layers produced by combining organosilicon compounds such as tetraethoxysilane (TEOS, also known as tetraethylorthosilicate) with oxygen and/or ozone. The process can include an optional source of water, such as water vapor, hydrogen peroxide, or an alcohol that forms water when oxygenated. The gap fill layers are deposited subsequent to plasma enhanced deposition of a conformal layer from the same components by turning off a power source used to form a plasma. The presence of water in the reactor was believed to result in a slightly improved gap fill process.
U.S. Pat. No. 5,610,105, issued Mar. 11, 1997, describes an intermetal dielectric layer produced by low temperature PECVD of TEOS and water, followed by annealing in an oxygen atmosphere to densify the dielectric layer.
U.S. Pat. No. 5,710,079, issued Jan. 20, 1998, describes a gap fill process using silicon oxide layers produced by combining organosilicon compounds such as TEOS with ozone and water using UV light to decompose the ozone. Rapid decomposition of the ozone was assumed to form atomic oxygen that combines with water to form peroxide.
U.S. Pat. No. 5,360,646, issued Nov. 1, 1994, describes a gap fill process using silicon oxide layers produced by combining TEOS with acetic acid. The highly electronegative oxygen in TEOS reacts with hydrogen from the acetic acid to form hydroxyl groups within the deposited silicon oxide film.
The available methods for depositing silicon oxide that contains hydroxyl groups do not provide uniform dielectric layers that have low dielectric constants. Therefore, processes are desired that provide uniform deposits of silicon oxides containing hydroxyl groups deposit and having low dielectric constants.
The present invention provides a method and apparatus for uniformly depositing a silicon oxide layer having a low dielectric constant for use as a gap fill layer, a pre-metal dielectric layer, an inter-metal dielectric layer, or a shallow trench isolation dielectric layer in sub-micron devices. The method comprises reacting one or more silicon compounds that contain carbon (i.e., organosilicon compounds) with a hydroxyl forming compound at a substrate temperature less than about 400xc2x0 C. The organosilicon compounds preferably contain one or more silicon-carbon bonds that remain in the deposited dielectric layers after reaction with a hydroxyl forming compound such as hydrogen peroxide or dimethyldioxirane. The hydroxyl forming compound may be produced prior to, or during deposition, such as by oxidation of water using ozone and UV light, by reaction of acetone and potassium monoperoxy sulfate to form dimethyldioxirane, or by oxidation or an organic compound that forms hydroxyls, such as oxidation of isopropyl alcohol with ozone or oxygen to produce acetone and hydrogen peroxide. In addition, the hydroxyl forming compound could be an acid such as acetic acid that provides hydrogen that reacts with siloxane compounds to form hydroxyl groups, or an acid compound that reacts with water to form hydroxyl compounds.
Preferably, the dielectric layer is produced by depositing a conformal liner layer on a patterned metal layer from process gases comprising an organosilicon compound and an oxidizing gas. The process is optionally plasma assisted using an RF power density from 0.05 W/cm2 to about 1000 W/cm2, preferably a power density less than about 1 W/cm2, most preferably a power density ranging from about 0.1 to about 0.3 W/cm2. The gap fill layer is then deposited on the liner layer at a temperature less than about 300xc2x0 C. from process gases comprising the silicon compound and a hydroxyl forming compound, preferably less than about 40xc2x0 C. when using organosilicon compounds that contain silicon-carbon bonds. Deposition of uniform dielectric layers is substantially enhanced by dissociation of hydroxyl forming compounds such as water in a remote microwave or RF chamber.
The organosilicon compounds that produce uniform, low k dielectric layers preferably include one or more silicon-hydrogen bonds such as methylsilane, CH3SiH3, dimethylsilane, (CH3)2SiH2, trimethylsilane, (CH3)3SiH, and 1,1,3,3-tetramethyldisiloxane, (CH3)2xe2x80x94SiHxe2x80x94Oxe2x80x94SiHxe2x80x94(CH3)2. Gap fill layers can also be uniformily deposited from other organosilicon compounds such as tetramethylsilane, (CH3)4Si, and tetraethylorthosilicate (TEOS). The silicon oxide layers are cured at low pressure and high temperature to stabilize film properties such as moisture content.
The invention also provides a substrate processing system, having a chamber comprising a reaction zone, a substrate holder for positioning a substrate in the reaction zone, and a vacuum system, a gas distribution system connecting the reaction zone of the chamber to supplies of an organosilicon compound and a hydroxyl forming compound, an RF generator coupled to the gas distribution system for generating a plasma in the reaction zone, and a controller comprising a computer for controlling the chamber, the gas distribution system, and the RF generator. The controller has a memory coupled to the controller, the memory comprising a computer usable medium comprising a computer readable program code for selecting a process that deposits gap fill layers, pre-metal dielectric layers, inter-metal dielectric layers, or shallow trench isolation dielectric layers in sub-micron devices.